sn54hc03, sn74hc03 quadruple 2-input positive-nand gates with open-drain outputs scls077b march 1984 revised may 1997 1 post office box 655303 ? dallas, texas 75265 package options include plastic small-outline (d) and ceramic flat (w) packages, ceramic chip carriers (fk), and standard plastic (n) and ceramic (j) 300-mil dips description these devices contain four independent 2-input nand gates. they perform the boolean function y = a ? b or y = a + b in positive logic. the open-drain outputs require pullup resistors to perform correctly. they may be connected to other open-drain outputs to implement active-low wired-or or active-high wired-and functions. the sn54hc03 is characterized for operation over the full military temperature range of 55 c to 125 c. the sn74hc03 is characterized for operation from 40 c to 85 c. function table (each gate) inputs output a b y h h l l xh x l h logic symbol 2 1 1a 2 1b 1y 3 4 2a 5 2b 2y 6 9 3a 10 3b 3y 8 12 4a 13 4b 4y 11 & 2 this symbol is in accordance with ansi/ieee std 91-1984 and iec publication 617-12. pin numbers shown are for the d, j, n, and w packages. logic diagram (positive logic) a b y please be aware that an important notice concerning availability, standard warranty, and use in critical applications of texas instruments semiconductor products and disclaimers thereto appears at the end of this data sheet. 1 2 3 4 5 6 7 14 13 12 11 10 9 8 1a 1b 1y 2a 2b 2y gnd v cc 4b 4a 4y 3b 3a 3y sn54hc03 . . . j or w package sn74hc03 ...d or n p ackage (top view) 3212019 910111213 4 5 6 7 8 18 17 16 15 14 4a nc 4y nc 3b 1y nc 2a nc 2b 1b 1a nc 3y 3a v 4b 2y gnd nc sn54hc03 . . . fk package (top view) cc nc no internal connection copyright ? 1997, texas instruments incorporated production data information is current as of publication date. products conform to specifications per the terms of texas instruments standard warranty. production processing does not necessarily include testing of all parameters.
sn54hc03, sn74hc03 quadruple 2-input positive-nand gates with open-drain outputs scls077b march 1984 revised may 1997 2 post office box 655303 ? dallas, texas 75265 absolute maximum ratings over operating free-air temperature range 2 supply voltage range, v cc 0.5 v to 7 v . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . input clamp current, i ik (v i < 0 or v i > v cc ) (see note 1) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . output clamp current, i ok (v o < 0 or v o > v cc ) (see note 1) 20 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous output current, i o (v o = 0 to v cc ) 25 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . continuous current through v cc or gnd 50 ma . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . package thermal impedance, q ja (see note 2): d package 127 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . n package 78 c/w . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . storage temperature range, t stg 65 c to 150 c . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 2 stresses beyond those listed under aabsolute maximum ratingso may cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other conditions beyond those indicated under arecommended operating conditi onso is not implied. exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. notes: 1. the input and output voltage ratings may be exceeded if the input and output current ratings are observed. 2. the package thermal impedance is calculated in accordance with jesd 51, except for through-hole packages, which use a trace length of zero. recommended operating conditions sn54hc03 sn74hc03 unit min nom max min nom max unit v cc supply voltage 2 5 6 2 5 6 v v cc = 2 v 1.5 1.5 v ih high-level input voltage v cc = 4.5 v 3.15 3.15 v v cc = 6 v 4.2 4.2 v cc = 2 v 0 0.5 0 0.5 v il low-level input voltage v cc = 4.5 v 0 1.35 0 1.35 v v cc = 6 v 0 1.8 0 1.8 v i input voltage 0 v cc 0 v cc v v o output voltage 0 v cc 0 v cc v v cc = 2 v 0 1000 0 1000 t t input transition (rise and fall) time v cc = 4.5 v 0 500 0 500 ns v cc = 6 v 0 400 0 400 t a operating free-air temperature 55 125 40 85 c electrical characteristics over recommended operating free-air temperature range (unless otherwise noted) parameter test conditions v cc t a = 25 c sn54hc03 sn74hc03 unit parameter test conditions v cc min typ max min max min max unit i oh v i = v ih or v il , v o = v cc 6 v 0.01 0.5 10 5 m a 2 v 0.002 0.1 0.1 0.1 i ol = 20 m a 4.5 v 0.001 0.1 0.1 0.1 v ol v i = v ih or v il 6 v 0.001 0.1 0.1 0.1 v i ol = 4 ma 4.5 v 0.17 0.26 0.4 0.33 i ol = 5.2 ma 6 v 0.15 0.26 0.4 0.33 i i v i = v cc or 0 6 v 0.1 100 1000 1000 na i cc v i = v cc or 0, i o = 0 6 v 2 40 20 m a c i 2 v to 6 v 3 10 10 10 pf
sn54hc03, sn74hc03 quadruple 2-input positive-nand gates with open-drain outputs scls077b march 1984 revised may 1997 3 post office box 655303 ? dallas, texas 75265 switching characteristics over recommended operating free-air temperature range, c l = 50 pf (unless otherwise noted) (see figure 1) parameter from to v cc t a = 25 c sn54hc03 sn74hc03 unit parameter (input) (output) v cc min typ max min max min max unit 2 v 60 105 155 131 t plh a or b y 4.5 v 13 25 36 31 ns 6 v 10 23 31 27 2 v 50 100 150 125 t phl a or b y 4.5 v 10 20 30 25 ns 6 v 8 17 25 21 2 v 38 75 110 95 t f y 4.5 v 8 15 22 19 ns 6 v 6 13 19 16 operating characteristics, t a = 25 c parameter test conditions typ unit c pd power dissipation capacitance per gate no load 20 pf parameter measurement information voltage waveforms propagation delay and output transition times 50% 50% 10% 10% 90% v cc v oh v ol 0 v t f input in-phase output 50% t plh t phl 50% 10% 10% 90% v oh v ol t f t phl t plh out-of-phase output load circuit test point from output under test c l = 50 pf (see note a) v cc r l = 1 k w notes: a. c l includes probe and test-fixture capacitance. b. phase relationships between waveforms were chosen arbitrarily. all input pulses are supplied by generators having the followi ng characteristics: prr 1 mhz, z o = 50 w , t r = 6 ns, t f = 6 ns. c. the outputs are measured one at a time with one input transition per measurement. voltage waveform input rise and fall times 50% 50% 10% 10% 90% 90% v cc 0 v t r t f input figure 1. load circuit and voltage waveforms
important notice texas instruments and its subsidiaries (ti) reserve the right to make changes to their products or to discontinue any product or service without notice, and advise customers to obtain the latest version of relevant information to verify, before placing orders, that information being relied on is current and complete. all products are sold subject to the terms and conditions of sale supplied at the time of order acknowledgement, including those pertaining to warranty, patent infringement, and limitation of liability. ti warrants performance of its semiconductor products to the specifications applicable at the time of sale in accordance with ti's standard warranty. testing and other quality control techniques are utilized to the extent ti deems necessary to support this warranty. specific testing of all parameters of each device is not necessarily performed, except those mandated by government requirements. certain applications using semiconductor products may involve potential risks of death, personal injury, or severe property or environmental damage (acritical applicationso). ti semiconductor products are not designed, authorized, or warranted to be suitable for use in life-support devices or systems or other critical applications. inclusion of ti products in such applications is understood to be fully at the customer's risk. in order to minimize risks associated with the customer's applications, adequate design and operating safeguards must be provided by the customer to minimize inherent or procedural hazards. ti assumes no liability for applications assistance or customer product design. ti does not warrant or represent that any license, either express or implied, is granted under any patent right, copyright, mask work right, or other intellectual property right of ti covering or relating to any combination, machine, or process in which such semiconductor products or services might be or are used. ti's publication of information regarding any third party's products or services does not constitute ti's approval, warranty or endorsement thereof. copyright ? 1998, texas instruments incorporated
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